Various semiconductor memory technologies are susceptible to disturbances in data stored in memory cells. Once such disturbance is commonly referred to as a “memory disturb.” A memory disturb typically occurs when a stimulus inadvertently alters a logical state of a data bit, thereby corrupting the data. Examples of stimuli include electrical voltages and currents and related phenomena (e.g., hot-carrier injection, etc.), as well as electro-magnetic radiation. A memory disturb, for example, might occur when applying a programming voltage to a conductor associated with both a selected memory cell that will be programmed, and unselected memory cells that are not intended to be programmed. Generally, unselected memory cells are either coupled to, or located adjacent to, the same bit lines and/or words lines as the selected memory. Memory disturbs, therefore, can reduce the ability of a memory, including non-volatile memory, to retain data.
Conventional Flash memory technology is a common type of memory technology that is susceptible to memory disturbs. A typical Flash memory cell structure includes a gate, a source, and a drain, and the usual mechanisms by which it stores data include Fowler-Norheim tunneling and hot electron injection. Flash memory generally experiences memory disturbs when bit line voltages partially activate, or turn on, one or more select transistors either in adjacent bit lines, or in a word line of unselected words, thereby altering the threshold voltage. Memory disturbs can occur in Flash memory cells during programming or erasing cycles when relatively high voltages, usually of singular magnitude and/or polarity, such as +12 volts, are applied.
Various approaches have been implemented to ameliorate the memory disturbs in Flash memory. For example, the rate at which a singled-valued programming voltage is applied to Flash memory arrays have be reduced. While this and other traditional approaches to reduce memory disturbs in conventional memory are functional, they have their drawbacks. For instance, typical disturb reduction measures are limited to a single layer of memory. And these typical disturb reduction measures are designed to accommodate memory cells having a gate, a source, and a drain structure, which are not well-suited to accommodate different memory technologies.
It would be desirable to provide improved techniques, systems and devices that minimize one or more of the drawbacks associated with conventional techniques for protecting data stored in memory.
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